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EXEL Microelectronics, Inc.
* 2.7 to 5.5V Operation (XL93LC56) aS 4.5 to 5.5V Operation (XL93LC56A) at Temperature Range: -40C to +85C * Extended .D w * State-of-the-Art Architecture w-- Nonvolatile data storage w -- Fully TTL compatible inputs and outputs -- Auto increment for efficient data dump * Hardware and Software Write Protection -- Defaults to write-disabled state at power up -- Software instructions for write-enable/disable -- VCC lockout inadvertent write protection (XL93LC56A) Low Power Consumption -- 1mA active -- 1A standby Low Voltage Read Operations -- Reliable read operations down to 2.0 volts Advanced Low Voltage CMOS E2 PROM Technology Versatile, Easy-to-Use Interface -- Self-timed programming cycle -- Automatic erase-before-write -- Programming Status Indicator -- Word and chip erasable
FEATURES
ee h
4U t
om .c
XL93LC56/56A
2,048-Bit Serial Electrically Erasable PROM with 2V Read Capability
PIN CONFIGURATIONS
Plastic Dual-in-line "P" Package
CS 1 SK 2 DI 3 DO 4 8 VCC
JEDEC Small Outline "RY" Package
CS 1 SK 2 DI 3
*
* * *
*
Durable and Reliable -- 100-year data retention after 100K write cycles -- Minimum of 100,000 erase/write cycles -- Unlimited read cycles -- ESD protection (EIAJ and JEDEC standard)
OVERVIEW
w
w
.D w
t a
S a
e h
DO 4
t e
U 4
8 VCC 7 NC 6 NC 5 GND
.c
m o
6 NC 5 GND
7 NC
JEDEC Small Outline "Y" Package
8 NC 7 GND 6 DO 5 DI
NC 1 VCC 2 CS 3 SK 4
D0005 ILL A01.1
PIN NAMES CS SK DI DO GND VCC NC Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Not Connected
The XL93LC56/56A is a cost effective 2,048-bit, nonvolatile, serial E2PROM. It is fabricated using EXEL's advanced CMOS E2 PROM technology. The XL93LC56/ 56A provides efficient nonvolatile read/write memory arranged as 128 registers of 16 bits each. Seven 11-bit instructions control the operation of the device, which include read, write, and mode enable functions. The data output pin (DO) indicates the status of the device during the self-timed nonvolatile programming cycle.
EXEL Microelectronics, Inc. 2150 Commerce Drive * San Jose, CA 95131 PHONE 408 432-0500 * FAX 408 432-8710 * Internet www.exel.com
om .c The self-timed write cycle includes an automatic erasebefore-write capability. To protect against inadvertent 4U the writes, the WRITE instruction is accepted onlytwhile chip is in the write enabled state. Data is written in 16 bits ee If Chip per write instruction into the selected register. Select (CS) is brought HIGH after initiation of the write Sh the READY/ cycle, the Data Output (DO) pin will indicate a BUSY status of the chip. at .D w w w
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XL93LC56/56A
BLOCK DIAGRAM
DI
INSTRUCTION REGISTER (11 BITS)
DATA REGISTER (16 BITS)
DUMMY BIT R/W AMPS
DO
CS
INSTRUCTION DECODE, CONTROL AND CLOCK GENERATION
ADDRESS REGISTER
1 OF 128 DECODER
E2 PROM ARRAY (128x16)
SK WRITE ENABLE
HIGH VOLTAGE GENERATOR
D0005 ILL B01.2
APPLICATIONS The XL93LC56/56A is ideal for high volume applications requiring low power and low density storage. This device uses a cost effective, space saving 8-pin package. Candidate applications include robotics, alarm devices, electronic locks, meters and instrumentation settings. ENDURANCE AND DATA RETENTION The XL93LC56/56A is designed for applications requiring up to 100,000 erase/write cycles per bit. It provides 100 years of secure data retention without power after the execution of 100,000 write cycles. DEVICE OPERATION The XL93LC56/56A is controlled by seven 11-bit instructions. Instructions are clocked in (serially) on the DI pin. Each instruction begins with a logical "1" (the start bit). This is followed by the opcode (2 bits), the address field (8 bits), and data, if appropriate. The clock signal (SK) may be halted at any time and the XL93LC56/56A will remain in its last state. This allows full static flexibility and maximum power conservation. Read (READ) The READ instruction is the only instruction that results in serial data on the DO pin. After the read instruction and address have been decoded, data is transferred from the selected memory register into a 16-bit serial shift register. (Please note that one logical "0" bit precedes the actual 16bit output data string). The output on DO changes during the LOW-TO-HIGH transitions of SK. (See Figure 2.)
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Low Voltage Read The XL93LC56/56A has been designed to ensure that data read operations are reliable in low voltage environments. The XL93LC56/56A is guaranteed to provide accurate data during read operations with VCC as low as 2.0V. Auto Increment Read Operations In order to facilitate memory transfer operations, the XL93LC56/56A has been designed to output a continuous stream of memory content in response to a single read operation instruction. To utilize this function, the system asserts a read instruction specifying a start location address. Once the 16 bits of the addressed word have been clocked out, the data in consecutively higher address locations is output. The address will wrap around continuously with CS HIGH until the Chip Select control pin is brought LOW. This allows for single instruction data dumps to be executed with a minimum of firmware overhead. Write Enable (WEN) The write enable (WEN) instruction must be executed before any device programming can be done. When VCC is applied, this device powers up in the write disabled state. The device then remains in a write disabled state until a WEN instruction is executed. Thereafter the device remains enabled until a WDS instruction is executed or until VCC is removed. (NOTE: Neither the WEN nor the WDS instruction has any effect on the READ instruction. See Figure 3.)
2
XL93LC56/56A
Write (WRITE) The WRITE instruction includes 16 bits of data to be written into the specified register. After the last data bit has been clocked into DI, and before the next rising edge of SK, CS must be brought LOW. The falling edge of CS initiates the self-timed programming cycle. After a minimum wait of 250ns from the falling edge of CS (tCS), if CS is brought HIGH, DO will indicate the READY/ BUSY status of the chip: logical "0" means programming is still in progress; logical "1" means the selected register has been written, and the part is ready for another instruction. (See Figure 4.) (NOTE: The combination of CS HIGH, DI HIGH and the rising edge of the SK clock, resets the READY/BUSY flag. Therefore, it is important not to reset the READY/BUSY flag through this combination of control signals, if you want to access it). Before a WRITE instruction can be executed, the device must be write enabled (see WEN). Write All (WRALL) The write all (WRALL) instruction programs all registers with the data pattern specified in the instruction. As with the WRITE instruction, if CS is brought HIGH after a minimum wait of 250ns (tCS), the DO pin indicates the READY/BUSY status of the chip. (See Figure 5.) Write Disable (WDS) The write disable (WDS) instruction disables all programming capabilities. This protects the entire memory array against accidental modification of data until a WEN instruction is executed. (When VCC is applied, the part powers up in the write disabled state.) To protect data, a WDS instruction should be executed upon completion of each programming operation. (NOTE: Neither the WEN nor the WDS instruction has any effect on the READ instruction. See Figure 6.) Erase The Erase instruction (ERASE) programs the addressed memory location to all "1s." Once the address is clocked in, the falling edge of CS will initiate the internal programming cycle. After waiting a minimum 250ns, the READY/ BUSY status can be monitored on DO. Erase All (ERAL) Full chip erase is provided for ease of programming. Erasing the entire chip involves setting all bits in the entire memory array to a logical "1." (See Figure 8.) VCC Lockout - Inadvertent Write Protection (XL93LC56A only) To ensure against inadvertent write operations, the XL93LC56A has been equipped with an internal VCC sensor circuit which inhibits data alteration when the supply voltage (VCC) falls below VWI. If the applied VCC is below 3.75V (typical), the XL93LC56A is inhibited from executing write operations thereby protecting the nonvolatile data from inadvertent operations.
XL93LC56/56A INSTRUCTION SET
Instruction READ WEN (Write Enable) WRITE WRALL (Write All Registers) WDS (Write Disable) ERASE ERAL (Erase All Registers) Start Bit 1 1 1 1 1 1 1 OP Code 10 00 01 00 00 11 00 Address X(A6-A0) 11XXXXXX X(A6-A0) 01XXXXXX 00XXXXXX X(A6-A0) 10XXXX
D0005 PGM T01.2
Input Data
D15-D0 D15-D0
3
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XL93LC56/56A
ABSOLUTE MAXIMUM RATINGS Temperature under bias: ................................................................................................................... -40C to +85C Storage Temperature ....................................................................................................................... -65C to +150C Lead Soldering Temperature (less than 10 seconds) ...................................................................................... 300C Supply Voltage ............................................................................................................................................. 0 to 6.5V Voltage on Any Pin ........................................................................................................................ -0.3 to Vcc + 0.3V ESD Rating ..................................................................................................................................................... 2000V
NOTE: These are STRESS ratings only. Appropriate conditions for operating these devices are given elsewhere in this specification. Stresses beyond those listed here may permanently damage the part. Prolonged exposure to maximum ratings may adversely affect device reliability.
DC ELECTRICAL CHARACTERISTICS TA = -40C to +85C
XL93LC56 Symbol Parameter Conditions VCC = 3.0V10% Min ICC1 ICC2 ISB ILI ILO VIL VIH VOL1 VOH1 VOH2 VOH2 VWI Operating Current CMOS Input Levels Operating Current TTL Input Levels Standby Current Input Leakage Output Leakage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output High Voltage Output High Voltage Write Inhibit Threshold IOL = 2.1mA TTL IOH = -400A TTL IOH = -10A CMOS IOH = -10A CMOS VCC-0.2 n/a n/a n/a 0.2 VCC-0.2 2.7 4.4 CS = VCC, SK = 250KHz Max 2 XL93LC56/56A VCC = 5.0V10% Min Max 2 XL93LC56/56A VCC = 2.0V (Read Only) Min Max 2 mA Units
CS = VIH, SK = 1MHz CS = DI = SK =0V VIN = 0V to VCC (CS, SK, DI) VOUT = 0V to VCC, CS = 0V -0.1
n/a 2 1 1 0.15VCC n/a 2.4 -0.1 2
5 2 1 1 0.8 -0.1
n/a 2 1 1 0.1 VCC n/a n/a 0.2 VCC-0.2 n/a n/a
mA A A A V V V V V V V
0.8 VCC VCC+0.2
VCC+0.2 0.9 VCC VCC+0.2 0.4 0.2
D0005 PGM T02.1
AC ELECTRICAL CHARACTERISTICS TA = -40C to +85C
XL93LC56 Symbol Parameter Conditions VCC = 3.0V10% Min fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tWP SK Clock Frequency SK High Time SK Low Time Minimum CS Low Time CS Setup Time DI Setup Time CS Hold Time DI Hold Time Output Delay to "1" Output Delay to "0" CS to Status Valid CS to DO in 3-state Write Cycle Time Relative to SK Relative to SK Relative to SK Relative to SK AC Test AC Test AC Test CL = 100pF CS = Low to DO = Hi-Z CS = Low to DO = Ready 0 1000 1000 1000 200 400 0 400 2000 2000 2000 400 25 Max 250 XL93LC56/56A VCC = 5.0V10% Min 0 400 250 250 50 100 0 100 500 500 500 100 10 Max 1000 XL93LC56/56A VCC = 2.0V (Read Only) Min 0 2000 2000 1000 200 400 0 400 2000 2000 2000 400 n/a Max 250 KHz ns ns ns ns ns ns ns ns ns ns ns ms Units
D0005 PGM T03.1 D0005 3/96 DVPTD 6931-04
4
XL93LC56/56A
CAPACITANCE TA = 25C, f = 250KHz
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Max 5 5 Units pF pF
D0005 PGM T04.1
t CS CS tCSS SK tDIS DI tPDO DO (READ) t SV DO (WRITE) *T = 1/f SK STATUS VALID
D0005 ILL F01.1
T* tSKH t SKL t CSH
tDIH
t PD1
t DF
FIGURE 1. SYNCHRONOUS DATA TIMING
t CS CS
SK
*
DI
0
1
1
0
X
A6
A0
DO
0
D15
D0 D15 **
D0005 ILL F02.1
* This leading clock is optional. ** Address pointer automatically cycles to the next register.
FIGURE 2. READ CYCLE TIMING
5
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XL93LC56/56A
t CS CS
SK
*
DI DO
0
1
0
0
1
1
High impedance
D0005 ILL F03.1
* This leading clock is optional.
FIGURE 3. WRITE ENABLE (WEN) CYCLE TIMING
t CS CS
SK
*
DI
0
1
0
1
X
A6
A0 D15
D0
tSV DO
* This leading clock is optional.
BUSY READY
t DF
t WP
D0005 ILL F04.1
FIGURE 4. WRITE CYCLE TIMING
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6
XL93LC56/56A
t CS CS
SK
*
DI
0
1
0
0
0
1
D15
D0
t SV DO
* This leading clock is optional.
BUSY READY
t WP
D0005 ILL F05.1
FIGURE 5. WRITE ALL (WRALL) CYCLE TIMING
t CS CS
SK
*
DI DO
0
1
0
0
0
0
High impedance
D0005 ILL F06.1
* This leading clock is optional.
FIGURE 6. WRITE DISABLE (WDS) CYCLE TIMING
7
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XL93LC56/56A
t CS CS
SK
*
DI
0
1
1
1
X
A6
A0
t SV DO
BUSY READY
t DF
t WP
* This leading clock is optional.
D0005 ILL F07.1
FIGURE 7. ERASE (REGISTER) CYCLE TIMING
t CS CS
SK
*
DI
0
1
0
0
1
0 t SV t DF
READY
DO
BUSY
t WP
* This leading clock is optional.
D0005 ILL F08.1
FIGURE 8. ERASE ALL (ERAL) CYCLE TIMING
D0005 3/96 DVPTD 6931-04
8
XL93LC56/56A
PACKAGE DIAGRAMS Plastic Dual-in-line (Type "P") Package (PDIP)
.375 (9.525)
PIN 1 INDICATOR
.250 (6.350)
.300 (7.620) .070 (1.778) .0375 (0.952) .015 (.381) Min. SEATING PLANE .130 (3.302) .060 .005 (1.524) .127 TYP. .100 (2.54) TYP. .130 (3.302) .018 (.457) TYP. .350 (8.89) .009 .002 (.229 .051) 5-7TYP. (4 PLCS) 0-15
8pn PDIP/P ILL.3
All dimensions in inches (mm).
8 Pin SOIC (Type "Y," "RY") Package (JEDEC 150 mil body width)
.050 (1.27) TYP. .050 (1.270) TYP. 8 Places
.157 (4.00) .150 (3.80)
.275 (6.99) TYP.
1 .196 (5.00) .189 (4.80)
.030 (.762) TYP. 8 Places
FOOTPRINT
.061 (1.75) .053 (1.35) .020 (.50) x45 .010 (.25)
.0192 (.49) .0138 (.35)
.0098 (.25) .004 (.127) .05 (1.27) TYP.
.035 (.90) .016 (.40)
.244 (6.20) .228 (5.80)
8pn JEDEC SOIC ILL. 1
All dimensions in inches (mm).
* See cover page for pinout options.
9
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XL93LC56/56A
ORDERING INFORMATION Standard Configurations
Prefix Type XL Part Type 93LC56 Package Range P, Y, RY
D0005 PGM T05.2
Voltage 3 Volts, 5 Volts
Part Numbers: XL 93LC56 A P
Prefix
Package Type Y = SOIC (JEDEC) 150 mil RY = SOIC (JEDEC) 150 mil P = PDIP 300 mil
Part Number 93LC56
Voltage Range A = 5 Volts Blank = 3 to 5 Volts
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XL93LC56/56A
MARKING INFORMATION
Marking for XL93LC56AP Marking for XL93LC56AY Marking for XL93LC56ARY
YWW XL93LC56AP
LC56A
YWW
LR56A
YWW
Marking for XL93LC56P
Marking for XL93LC56Y
Marking for XL93LC56RY
YWW XL93LC56P
LC56
YWW
LR56
YWW
D0005 ILL C01.2
* See cover page for pinout options.
TAPE AND REEL (EMBOSSED) INFORMATION Surface mount devices, which are normally shipped in antistatic plastic tubes, are also available mounted on embossed tape for customers using automatic placement systems. The following diagram provides general information regarding the direction of the IC's. Tape "E2" shall be designated with PIN 1 at the trail direction.
PIN 1
E2
Tape un-reel direction
T&R Y ILL.2
11
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XL93LC56/56A
NOTICE EXEL Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXEL Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user's specific application. While the information in this publication has been carefully checked, EXEL Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission. EXEL Microelectronics, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXEL Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of EXEL Microelectronics, Inc. is adequately protected under the circumstances. (c) Copyright 1996 EXEL Microelectronics, Inc. Reproduction in whole or in part, without the prior written consent of EXEL Microelectronics, Inc. is prohibited.
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